Costs
GPU cloud in France and Europe: choosing an H100, H200 or B300 instance
Compare exact instance sizes, GPU counts, regions and operating costs before renting a European GPU server from Scaleway, OVHcloud or another provider.
Costs
Compare exact instance sizes, GPU counts, regions and operating costs before renting a European GPU server from Scaleway, OVHcloud or another provider.
Costs
Calculate API and self-hosted inference costs with a fixed quality target, input/output mix, full operating cost and a server capacity check.
Runtimes
A worked KV cache calculation in GiB, with the limits of PagedAttention, FP8 quantization and prefix caching when sizing an inference server.
Runtimes
Compare model support, memory, continuous batching and deployment paths before measuring useful throughput and latency on your own workload.
Kernel & Perf
An AI job can slow down without a GPU failing outright. Minerva connects infrastructure and workload signals to help operators investigate the dependencies behind that slowdown.
Edge AI
Compare LFM3 with small Qwen models on phones: iPhone measurements, real memory use, task quality and integration into iOS, Android and embedded applications.
Kernel & Perf
A GPU can be busy without using all its resources. Follow an inference request to understand ThunderKittens, megakernels and the research behind Flapping Airplanes.
Kernel & Perf
An agent finishes a patch, then waits for test machines to fetch the code. Scion provides a starting point for understanding that hidden cost and the infrastructure choices behind it.
Runtimes
Pick a category, route a request, score a document. Jev returns answers your code can use directly. Here is what that specialization changes and how to evaluate it.
Silicon
A single GPU rack already draws more than 2,000 amps. At 1 MW, today's 54 V distribution would need close to 20,000: here is why NVIDIA and the hyperscalers are moving to 800 V DC, and what remains unsolved.
Runtimes
Your model fits in memory, but the answer arrives slowly. A smaller model can draft the next tokens. Here is when that extra work pays off.
Silicon
Your model has outgrown one GPU. AMD and NVIDIA offer different ways to make room, but total memory alone will not tell you which system fits your work.
Runtimes
Your GPU is busy while another computer sits idle. NVIDIA PAIR can send it requests, but whether you finish sooner depends on how the work is shared.
Silicon
Ryzen AI Halo and DGX Spark both offer 128 GB, but performance changes with model and protocol. Vendor claims and independent LLM tests, audited.
Silicon
BlueField-4 and Pensando Salina compute no tokens. They move networking, storage, security and selected KV-cache transfers away from the host CPU. Here is the data path that can free the GPU, or merely move the bottleneck.
Costs
MLPerf Endpoints measures an inference service through its API at several load levels. Version 0.7 finally traces the curve between throughput, TTFT, TPOT and quality, but it does not normalize cost yet.
Runtimes
MLPerf E2E-RAG times ingestion, retrieval, reranking and four LLM roles inside a multi-hop loop. Its throughput is comparable, but the Offline scenario and 35% reference accuracy bound the verdict.
Silicon
UALink 2.0 standardizes compute inside the network; NVLink 6 integrates it into its switches. Here is what the mechanism changes, and why Helios and Vera Rubin still cannot be ranked.
Runtimes
Expert parallelism moves tokens to weights. DWDP reverses the path, prefetching remote expert weights and removing cross-rank synchronization. The bet works inside a narrow regime.
Silicon
Assess a 96 GB M3 Ultra for local LLMs: 819 GB/s bandwidth, model weights, context and MLX. Includes the distinction from the current M5 Ultra catalog.
Silicon
An RTX PRO 6000 and three RTX 5090s each add up to 96 GB of GDDR7. For an LLM, that is where the equality ends: one pool, one sharded model and three independent replicas pay different costs.
Runtimes
vLLM 0.27 lets every engine serve CPU-resident KV blocks to another peer over NIXL, filters tiers per request and emits routable cache events. The mechanism is shipped; the production speedup is not proven.
Silicon
RTX Spark brings up to 128 GB of unified memory and native CUDA to Windows on Arm. As of August 12, CUDA remains a developer preview, TensorRT-RTX is ready, and the LLM serving stack still needs qualification.
Runtimes
Kimi K3 activates 104 billion parameters out of 2.8 trillion, mixes KDA with MLA across a one-million-token context, and needs an eight-B300 or eight-MI355X node in vLLM's launch recipes.
Silicon
The MI455X carries 432 GB of HBM4, versus 288 GB on Rubin. AMD still has to prove that UALoE can turn that capacity advantage into rack-scale performance.
Silicon
The DGX Spark and the RTX 5090 answer two opposite questions: hosting a very large model, or serving a mid-size one fast. The duel in numbers, measurements and mechanisms included.
Runtimes
NVIDIA Dynamo 1.0, SGLang 0.5.12, TensorRT-LLM 1.3, Tenstorrent Blackhole: prefill/decode disaggregation reaches production. Implementations, benchmarks, and counter-arguments.
Runtimes
The KV cache is no longer a VRAM byproduct you just absorb: it has its own quantization (TurboQuant, ~3 bits), its transfer protocol, its tiered storage (KVBM G1→G4) and its own routing. Anatomy of that shift.
Silicon
How much VRAM does a local LLM need? The ~2 GB per billion parameters rule, the weight of the KV cache, what quantization changes, and what actually fits on your card.
Silicon
RTX Spark PCs are shipping: compare official laptop and desktop configurations with DGX Spark, while keeping bandwidth assumptions and measured results separate.
Silicon
TorchTPU, PyTorch/XLA, JAX, XLA and vLLM form a stack whose keystone is a compiler. How Google attacks the one asset that keeps developers on NVIDIA: the cost of leaving CUDA.